Difference between revisions of "S5L8920 (Hardware)"

Latest revision as of 16:03, 19 September 2016

Register	Description
Base: 0xBF500000
0x00	Bit 0 (1bit): Production Mode Bit 1 (1bit): Chip Firmware Bit 2 (1bit): Security Domain Bit 8 (1bit): Allow WFI (If 0, bit 8 of the aux control register is set at boot, causing WFI instructions to be parsed as a NOP) Bit 9 (1bit): Minimum Epoch Bit 10 (1bit): Chip Revision

@@ Line 1: / Line 1: @@
-== CHIPID ==
+== RAM ==
+* 0x40000000 through ?
-<table border=1 width=100%>
+* 0x4F000000 through ?
-<tr>
+* 0x84000000 through 0x84038000
-<td colspan=2><center><b>Base</b>: 0xBF500000</center></td>
+* 0x84100000 through 0x84103000
-</tr>
-<tr>
+== Peripherals ==
-<td width=50%><center><b>Register</b></center></td>
+=== CHIPID ===
-<td width=50%><center><b>Description</b></center></td>
+{| class="wikitable" |
-</tr>
+| colspan="2" | <b>Base</b>: 0xBF500000
-<tr>
+|-
-<td width=50%><center>0x00</center></td>
+! Register
-<td width=50%><center>
+! Description
-[[S5L8920 (Hardware - CHIPID#Identification Register)|Identification]]
+|-
-</center></td>
+| 0x00
-</tr>
+|
-</table>
+* '''Bit 0   (1bit)''': Production Mode
+* '''Bit 1   (1bit)''': Chip Firmware
+* '''Bit 2   (1bit)''': Security Domain
+* '''Bit 8   (1bit)''': Allow WFI (If 0, bit 8 of the aux control register is set at boot, causing WFI instructions to be parsed as a NOP)
+* '''Bit 9   (1bit)''': Minimum Epoch
+* '''Bit 10  (1bit)''': Chip Revision
+|}
+== Addresses ==
+* '''sha1''': 0x80100000 ('''device id''' = 0x22)
+* '''pke''': 0x83100000 ('''device id''' = 0x21)
+* '''aes''': 0x87801000 ('''device id''' = 0x25)
+* '''vic''': 0xBF200000
+* '''chipid''': 0xBF500000
+== Misc ==
+* '''Ramdisk Default Load Addr''': 0x44000000
+* '''iBoot Load Addr''': 0x4FF00000
+* '''LLB Load Addr''': 0x84000000
+* '''SecureROM Load Addr''': 0x0