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Difference between revisions of "NOR"
(New page: NOR typically refers to the NOR flash chip the application processor boots from. The baseband also uses a NOR flash. ==How to Access== This can be accessed using a patched iBoot or a kern...) |
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| − | NOR typically refers to the NOR flash chip the application processor boots from. The baseband also uses a NOR flash. |
+ | '''NOR''' typically refers to the NOR flash chip the application processor boots from. The baseband also uses a NOR flash. (See [https://en.wikipedia.org/wiki/Flash_memory Wikipedia's article about flash memory] for background on NOR flash in general.) |
==How to Access== |
==How to Access== |
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| − | This can be accessed using a patched iBoot or a kernel hack. It can possibly be dumped using /dev/kmem |
+ | This can be accessed using a patched [[iBoot (Bootloader)|iBoot]] or a [[kernel]] hack. It can possibly be dumped using /dev/kmem |
==Memory Map== |
==Memory Map== |
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| + | |||
| − | fill this in |
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| + | <table border=1 width=100%> |
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| + | <tr> |
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| + | <td width=50%><center><b>Offset</b></center></td> |
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| + | <td width=50%><center><b>Description</b></center></td> |
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| + | </tr> |
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| + | <tr> |
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| + | <td width=50%><center>0x0</center></td> |
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| + | <td width=50%><center>Configuration Data<br><br> |
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| + | '''0x0''': "2GMI" fourcc<br> |
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| + | '''0x4''': Block Size (0x40)<br> |
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| + | '''0x8''': Images Section Location Offset<br> |
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| + | '''0xC''': Images Section Location (In blocks)<br> |
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| + | '''0x10''': Images Section Length<br> |
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| + | '''0x30''': Checksum of this config data<br></center></td> |
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| + | </tr> |
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| + | <tr> |
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| + | <td width=50%><center>0x4000</center></td> |
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| + | <td width=50%><center>[[NOR (SysCfg)|SysCfg]] Section</center></td> |
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| + | </tr> |
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| + | <tr> |
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| + | <td width=50%><center>0x8000</center></td> |
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| + | <td width=50%><center>[[NOR (Firmware Images)|Images]] Section</center></td> |
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| + | </tr> |
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| + | <tr> |
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| + | <td width=50%><center>0xFC000</center></td> |
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| + | <td width=50%><center>[[NOR (NVRAM)|NVRAM]] Section (Note: This copy is the one iBoot uses)</center></td> |
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| + | </tr> |
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| + | <tr> |
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| + | <td width=50%><center>0xFE000</center></td> |
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| + | <td width=50%><center>[[NOR (NVRAM)|NVRAM]] Section (copy)</center></td> |
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| + | </tr> |
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| + | </table> |
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==Hardware== |
==Hardware== |
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| − | *iPhone -- some CFI compliant parallel |
+ | * [[M68AP|iPhone]] -- some CFI compliant parallel NOR |
| − | *iPhone 3G -- 1MB SPI NOR flash |
+ | * [[N82AP|iPhone 3G]] -- 1MB SPI NOR flash |
| + | * [[N18AP|iPod touch (3rd generation)]] and beyond -- The NOR is replaced with a dedicated partition of [[NAND]] |
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Latest revision as of 09:46, 26 March 2017
NOR typically refers to the NOR flash chip the application processor boots from. The baseband also uses a NOR flash. (See Wikipedia's article about flash memory for background on NOR flash in general.)
How to Access
This can be accessed using a patched iBoot or a kernel hack. It can possibly be dumped using /dev/kmem
Memory Map
0x0: "2GMI" fourcc |
|
Hardware
- iPhone -- some CFI compliant parallel NOR
- iPhone 3G -- 1MB SPI NOR flash
- iPod touch (3rd generation) and beyond -- The NOR is replaced with a dedicated partition of NAND
