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Difference between revisions of "Bootrom 240.4"
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| − | [[S5L8720]] bootrom revision for [[ |
+ | This is an [[S5L8720]] [[bootrom]] revision for [[N72AP|iPod touch (2nd generation)]] devices sold between {{date|2009|09}} and {{date|2009|09}}. It is located at 0x0 and uses SDRAM @ 0x22000000 for global variables. It patches the [[Pwnage]] exploit, as the bootrom now properly checks [[LLB]]'s signature. This bootrom is, however, vulnerable to the [[0x24000 Segment Overflow]] and the [[usb_control_msg(0xA1, 1) Exploit]]. |
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| + | == MMU == |
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| + | * '''0x0 - 0x40000000''': mapped as uncacheable and unbufferable |
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| + | * '''0x0 - 0x100000 (ROM)''': remapped as cacheable and bufferable |
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| + | * '''0x20000000 - 0x20100000 (ROM)''': remapped as cacheable and bufferable |
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| + | * '''0x22000000 - 0x22100000 (SDRAM)''': remapped as cacheable and bufferable |
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| + | For "Symbols", see also [[Address Mapping]]. |
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| + | [[Category:Bootrom]] |
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Latest revision as of 13:54, 17 September 2021
This is an S5L8720 bootrom revision for iPod touch (2nd generation) devices sold between September 2009 and September 2009. It is located at 0x0 and uses SDRAM @ 0x22000000 for global variables. It patches the Pwnage exploit, as the bootrom now properly checks LLB's signature. This bootrom is, however, vulnerable to the 0x24000 Segment Overflow and the usb_control_msg(0xA1, 1) Exploit.
MMU
- 0x0 - 0x40000000: mapped as uncacheable and unbufferable
- 0x0 - 0x100000 (ROM): remapped as cacheable and bufferable
- 0x20000000 - 0x20100000 (ROM): remapped as cacheable and bufferable
- 0x22000000 - 0x22100000 (SDRAM): remapped as cacheable and bufferable
For "Symbols", see also Address Mapping.
