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Difference between revisions of "Talk:S5L8720 (Hardware)"
ChronicDev (talk | contribs) (New page: ==Weird Registers (Code Snippet)== Here is the behavior of the weird registers I mentioned on the main article. Note that it does it to those four registers in vic0 and vic1, keep that in ...) |
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Revision as of 03:38, 11 February 2009
Weird Registers (Code Snippet)
Here is the behavior of the weird registers I mentioned on the main article. Note that it does it to those four registers in vic0 and vic1, keep that in mind so you don't think that there are 8 of these weird registers:
ROM:00004C84 VectorInterruptController_Init ; CODE XREF: Interrupts_Init+92�p
ROM:00004C84
ROM:00004C84 var_8 = -8
ROM:00004C84
ROM:00004C84 000 90 B5 PUSH {R4,R7,LR}
ROM:00004C86 00C 1B 4B LDR R3, =dword_38E00FE0
ROM:00004C88 00C 01 22 MOVS R2, #1
ROM:00004C8A 00C 52 42 NEGS R2, R2
ROM:00004C8C 00C 1B 68 LDR R3, [R3]
ROM:00004C8E 00C 1A 4B LDR R3, =dword_38E00FE4
ROM:00004C90 00C 1A 48 LDR R0, =Vector_Interrupt_Address_Table
ROM:00004C92 00C 01 AF ADD R7, SP, #0xC+var_8
ROM:00004C94 00C 1B 68 LDR R3, [R3]
ROM:00004C96 00C 1A 4B LDR R3, =dword_38E00FE8
ROM:00004C98 00C 00 21 MOVS R1, #0
ROM:00004C9A 00C 1B 68 LDR R3, [R3]
ROM:00004C9C 00C 19 4B LDR R3, =dword_38E00FEC
ROM:00004C9E 00C 1B 68 LDR R3, [R3]
ROM:00004CA0 00C 19 4B LDR R3, =unk_38E01FE0
ROM:00004CA2 00C 1B 68 LDR R3, [R3]
ROM:00004CA4 00C 19 4B LDR R3, =unk_38E01FE4
ROM:00004CA6 00C 1B 68 LDR R3, [R3]
ROM:00004CA8 00C 19 4B LDR R3, =unk_38E01FE8
ROM:00004CAA 00C 1B 68 LDR R3, [R3]
ROM:00004CAC 00C 19 4B LDR R3, =unk_38E01FEC
ROM:00004CAE 00C 1B 68 LDR R3, [R3]
PS: This is from the S5L8720 SecureROM, in case you were wondering about the weird load address.
